Conventional graphics processors include dedicated texture map processing circuitry that is configured to read texture data from texture maps stored in memory. Separate circuitry is configured to perform load and store operations to access the memory for performing other graphics processing such as z-buffering and blending. Providing separate circuitry for accessing memory requires more circuitry than is needed to support either texture reads or load and store operations.
Thus, there is an opportunity to reduce the circuitry used to access memory and/or address other issues associated with the prior art.